Comments on the optimum CMOS tapered buffer problem
- 1 January 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 29 (2) , 155-158
- https://doi.org/10.1109/4.272124
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
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- Driving large capacitance in MOS LIS systemsIEEE Journal of Solid-State Circuits, 1984
- CMOS circuit optimizationSolid-State Electronics, 1983
- Comments on "An optimized output stage for MOS integrated circuits" [with reply]IEEE Journal of Solid-State Circuits, 1975