Superconductor-insulator-normal- conductor-insulator-superconductor process development for integrated circuit applications

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Abstract
The paper reports on recent developments in a new technology process in LTS implementation to fabricate intrinsically shunted tunnel junctions. The process has been realized in SINIS multilayer thin-film technology. In various test series, circuits containing a large variety of single junctions and junction arrays of different contact areas and sizes were fabricated and measured. By variation of the oxidation parameters the fabrication process has been optimized for application in integrated circuits operating in RSFQ impulse logic. The junction parameter values realized for the critical current density range to up to about , those for the characteristic voltage to up to about . The junctions show nearly non-hysteretic current-voltage characteristics; the intra-wafer parameter spread is below 10%. The junctions realized fulfil the requirements imposed for digital RSFQ circuit operation at clock frequencies in the lower GHz frequency range.