An MCM/IC timing-driven placement algorithm featuring explicit design space exploration
- 23 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- Fidelity and near-optimality of Elmore-based routing constructionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Optimal wire sizing and buffer insertion for low power and a generalized delay modelPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- On area/depth trade-off in LUT-based FPGA technology mappingIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1994
- RITUAL: a performance driven placement algorithmIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1992
- Macro-cell and module placement by genetic adaptive search with bitmap-represented chromosomeIntegration, 1991
- Distributed genetic algorithms for the floorplan design problemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
- Geometric approach to VLSI layout compactionInternational Journal of Circuit Theory and Applications, 1990
- Performance-driven placement of cell based IC'sPublished by Association for Computing Machinery (ACM) ,1989
- A New Algorithm for Floorplan DesignPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- Optimal orientations of cells in slicing floorplan designsInformation and Control, 1983