On area/depth trade-off in LUT-based FPGA technology mapping
- 1 June 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 2 (2) , 137-148
- https://doi.org/10.1109/92.285741
Abstract
No abstract availableKeywords
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