A generation of CMOS readout ASICs for CZT detectors
- 1 December 2000
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 47 (6) , 1857-1867
- https://doi.org/10.1109/23.914460
Abstract
As a result of a cooperation between Brookhaven National Laboratory and eV Products a generation of high performance readout ASICs was developed. The ASICs, realized in CMOS 0.5 /spl mu/m technology, are available in several different versions, single or multi-channel and with unipolar or bipolar shaper, in view of their use in research, spectroscopy, medical, safeguard and industrial applications. Four innovative circuit solutions are implemented in the ASICs: (i) a high linearity compensated continuous reset system which self-adapts to a wide range of detector leakage currents with minimum noise contribution; (ii) a high order shaper realized by using the follow-the-leader feedback (FLF) approach; (iii) a class AB rail-to-rail output stage with high driving capability; (iv) a baseline holder (BLH) for the baseline stabilization. The basic structure of the ASICs, a description of the circuit solutions and the preliminary experimental results are reported.Keywords
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