Room-temperature vacancy migration in crystalline Si from an ion-implanted surface layer

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Abstract
Migration of vacancies in crystalline, n-type silicon at room temperature from Ge+-implanted (150 keV, 5×109–1×1011 cm−2) surface layers was studied by tracing the presence of P–V pairs (E centers) in the underlying layer using deep level transient spectroscopy (DLTS). Under the conditions we have examined, the vacancies migrate to a maximum depth of about 1 μm and at least one vacancy per implanted Ge ion migrates into the silicon crystal. The annealing of the E centers is accompanied, in an almost one-to-one fashion, by the appearance of a new DLTS line corresponding to a level at EC−Et≈0.15 eV that has donor character. It is argued that the center associated with this line is most probably the P2–V complex; it anneals at about 550 K. A lower limit of the RT-diffusion coefficient of the doubly charged, negative vacancy is estimated to be 4×10−11 cm2/s.