The accumulation-mode field-effect transistor: a new ultralow on-resistance MOSFET
- 1 August 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 13 (8) , 427-429
- https://doi.org/10.1109/55.192780
Abstract
An ultralow specific on-resistance, vertical channel, power MOSFET structure, based on current conduction via an accumulation layer formed on the surface of a trench (UMOS) gate structure, is described. Two-dimensional numerical simulations and experimental results have been obtained, demonstrating that a specific on-resistance approaching 100 mu Omega -cm/sup 2/ can be obtained for a silicon device capable of blocking 25 V.Keywords
This publication has 6 references indexed in Scilit:
- Reactive Ion Etching of Silicon Trenches Using SF 6 / O 2 Gas MixturesJournal of the Electrochemical Society, 1991
- Ultralow specific on resistance UMOSFET with trench contacts for source and body regions realised by selfaligned processElectronics Letters, 1991
- Trench DMOS transistor technology for high-current (100 A range) switchingSolid-State Electronics, 1991
- TDMOS-an ultra-low on-resistance power transistorIEEE Transactions on Electron Devices, 1988
- An ultra-low on-resistance power MOSFET fabricated by using a fully self-aligned processIEEE Transactions on Electron Devices, 1987
- Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfacesIEEE Transactions on Electron Devices, 1980