The Design of Error Checkers for Self-Checking Residue Number Arithmetic
- 1 April 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-32 (4) , 388-396
- https://doi.org/10.1109/tc.1983.1676240
Abstract
During the last few years residue number (RNS) arithmetic has gained increasing importance for providing high speed fault tolerant performance in dedicated digital signal processors. One factor that has limited the use of redundant RNS theory in practice is the hardware complexity of the error checker. This paper presents a mathematical analysis of the error correction algorithm which suggests a new design with considerably reduced hardware complexity. A hardward architecture for a high speed pipelined error checker is proposed.Keywords
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