Minority- and majority-carrier trapping in strain-relaxed Ge0.3Si0.7/Si heterostructure diodes grown by rapid thermal chemical-vapor deposition

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Abstract
Strain‐relaxed Ge0.3Si0.7/Si, grown by rapid thermal chemical‐vapor deposition, has been investigated with deep‐level transient spectroscopy (DLTS) and bias‐dependent electron‐beam‐induced current (EBIC). A single electron trap and several hole traps have been detected in these samples. The apparent electron capture cross section is found to be ∼2×10−13 cm2, which is several orders of magnitude larger than the apparent hole capture cross sections (∼10−17 cm2), and is responsible for the detection of the minority‐carrier electron trap even under reverse‐bias majority‐carrier capture conditions. All observed traps which were investigated as a function of filling pulse time exhibit logarithmic capture kinetics, as expected for extended defects, and the bias‐dependent DLTS peak height and EBIC relative defect contrast are consistent with the spatially varying dislocation density. Moreover, the trap concentration, as determined by DLTS, is correlated to the dislocation density, as determined by EBIC measurements. Based on a comparison of Arrhenius plots, the observed logarithmic capture kinetics, the correlation of trap density to dislocation density, and the observed bias dependence, the electron trap appears to be related to dislocation core states, while two of the hole traps appear to be related to either dislocation core states or Cottrell atmospheres.