Parallel Fault Simulation Using Distributed Processing*
- 1 December 1983
- journal article
- website
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Bell System Technical Journal
- Vol. 62 (10) , 3107-3137
- https://doi.org/10.1002/j.1538-7305.1983.tb03468.x
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Digital Logic Simulation in a Time-Based, Table-Driven EnvironmentComputer, 1975
- A Deductive Method for Simulating Faults in Logic CircuitsIEEE Transactions on Computers, 1972
- A Note on Three-Valued Logic SimulationIEEE Transactions on Computers, 1972