Analysis of high voltage TDDB measurements on Ta/sub 2/O/sub 5//SiO/sub 2/ stack
- 22 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 327-330
- https://doi.org/10.1109/iedm.1999.824162
Abstract
Time-dependent dielectric breakdown measurements on a SiO/sub 2//Ta/sub 2/O/sub 5/ (1.4/6 nm) stack are analyzed. After comparing current/voltage-curves, statistical distribution and time-to-breakdown values of this stack with SiO/sub 2/-layers, it is concluded that the high voltage breakdown of the stack is completely determined by the interfacial SiO/sub 2/-layer. Simple extrapolation of the time-to-breakdown to low voltages will yield incorrect reliability predictions.Keywords
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