Test results on an MNOS memory array
- 1 May 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 24 (5) , 564-568
- https://doi.org/10.1109/t-ed.1977.18779
Abstract
The NCR 2050 MNOS memory chip, developed under Air Force contract for frequency-preset applications in communications equipment, has been tested and evaluated. Results on retentivity, writing characteristics, pattern sensitivity, and endurance are presented.Keywords
This publication has 4 references indexed in Scilit:
- Endurance and memory decay of MNOS devicesJournal of Applied Physics, 1976
- IIIB-3 bias-temperature-stress studies of charge retention in dual-dielectric charge-storage cellsIEEE Transactions on Electron Devices, 1974
- Charge transfer in layered insulatorsSolid-State Electronics, 1973
- The drain-source protected MNOS memory device and memory endurancePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1973