ILAC: an automated layout tool for analog CMOS circuits
- 1 April 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 24 (2) , 417-425
- https://doi.org/10.1109/4.18603
Abstract
No abstract availableKeywords
This publication has 13 references indexed in Scilit:
- ILAC: an automated layout tool for analog CMOS circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- IDAC: an interactive design tool for analog CMOS circuitsIEEE Journal of Solid-State Circuits, 1987
- Simulated Annealing: Theory and ApplicationsPublished by Springer Nature ,1987
- A prototype framework for knowledge-based analog circuit synthesisPublished by Association for Computing Machinery (ACM) ,1987
- A New Algorithm for Floorplan DesignPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1986
- Effective use of virtual grid compaction in macro-module generatorsPublished by Association for Computing Machinery (ACM) ,1985
- A Global Routing Algorithm for General CellsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- Optimization by Simulated AnnealingScience, 1983
- Improved Compaction by Minimized Length of WiresPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983
- An Algorithm for Path Connections and Its ApplicationsIEEE Transactions on Electronic Computers, 1961