Gate-controlled double electron layer tunnellingtransistor and single transistor digital logic applications
- 30 April 1998
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 34 (9) , 921-922
- https://doi.org/10.1049/el:19980650
Abstract
A novel entirely planar quantum transistor based on tunnelling between two separate electron layers in an AlGaAs/GaAs double quantum well heterostructure is demonstrated. Using the gate-tunability of the tunnelling I-V characteristics, digital logic gates such as XOR and NAND are demonstrated using a single double electron layer tunnelling transistor.Keywords
This publication has 5 references indexed in Scilit:
- Field-induced resonant tunneling between parallel two-dimensional electron systemsApplied Physics Letters, 1991
- Oscillations up to 420 GHz in GaAs/AlAs resonant tunneling diodesApplied Physics Letters, 1989
- Observation of electron resonant tunneling in a lateral dual-gate resonant tunneling field-effect transistorApplied Physics Letters, 1989
- Parity generator circuit using a multistate resonant tunnelling bipolar transistorElectronics Letters, 1988
- Resonant tunneling in semiconductor double barriersApplied Physics Letters, 1974