An 800-MHz quadrature digital synthesizer with ECL-compatible output drivers in 0.8 μm CMOS

This publication has 8 references indexed in Scilit:

• A 200 MHz quadrature digital synthesizer/mixer in 0.8 μm CMOS
  IEEE Journal of Solid-State Circuits, 1995
• A monolithic digital chirp synthesizer chip with I and Q channels
  IEEE Journal of Solid-State Circuits, 1992
• Low-latency, high-speed numerically controlled oscillator using progression-of-states technique
  IEEE Journal of Solid-State Circuits, 1992
• A high-speed direct frequency synthesizer
  IEEE Journal of Solid-State Circuits, 1990
• High-speed CMOS circuit technique
  IEEE Journal of Solid-State Circuits, 1989
• Fast CMOS ECL receivers with 100-mV worst-case sensitivity
  IEEE Journal of Solid-State Circuits, 1988
• A 2- mu m CMOS digital adaptive equalizer chip for QAM digital radio modems
  IEEE Journal of Solid-State Circuits, 1988
• An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1987