Test Considerations for Gate Oxide Shorts in CMOS ICs

Abstract
Gate oxide shorts are defects that must be detected to produce high-reliability ICs. These problems will continue as devices are scaled down and oxide thicknesses are reduced to the 100-Å range. Complete detection of gate oxide shorts and other CMOS failure mechanisms requires measuring the IDD current during the quiescent state after each test vector is applied to the IC. A 100-percent stuck-at fault test set is effective only if each test vector is accompanied by an IDD measurement. This article examines the need for a fast, sensitive method of measuring IDD during each test vector and discusses problems confronting CMOS IC designers, test engineers and test instrumentation designers as they work to meet these demands.

This publication has 16 references indexed in Scilit: