Abstract
The control of implanted depth distributions by pre-amorphising silicon results in the production of defects which can impair the performance of devices fabricated in this fashion. The most stable-and therefore the most troublesome-defects are the dislocation loops which form at the amorphous/crystalline interface on annealing. A simple model for the evolution of these loops with annealing is presented. By using this model the temperature and time of the anneal required to remove these loops can be predicted. It also explains the anneal's dependence on the mass of the amorphising ion, the implantation temperature and the amorphous layer thickness. The model is shown to be supported by the currently available data.