Design, modeling, and characterization of monolithically integrated InP-based (1.55 μm) high-speed (24 Gb/s) p-i-n/HBT front-end photoreceivers
- 1 August 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Journal of Lightwave Technology
- Vol. 14 (8) , 1831-1839
- https://doi.org/10.1109/50.532020
Abstract
High-speed, long-wavelength InAlAs/InGaAs OEIC photoreceivers based on a p-i-n/HBT shared layer integration scheme have been designed, fabricated and characterized. The p-i-n photodiodes, formed with the 6000 /spl Aring/-thick InGaAs precollector layer of the HBT as the absorbing layer, exhibited a responsivity of /spl sim/0.4 A/W and a -3 dB optical bandwidth larger than 20 GHz at /spl lambda/=1.55 /spl mu/m. The fabricated three-stage transimpedance amplifier with a feedback resistor of 550 /spl Omega/ demonstrated a transimpedance gain of 46 dB/spl Omega/ and a -3 dB bandwidth of 20 GHz. The monolithically integrated photoreceiver with a 83 /spl mu/m p-i-n photodiode consumed a small dc power of 35 mW and demonstrated a measured -3 dB optical bandwidth of 19.5 GHz, which is the highest reported to date for an InAlAs/InGaAs integrated front-end photoreceiver. The OEIC photoreceiver also has a measured input optical dynamic range of 20 dB. The performance of individual devices and integrated circuits was also investigated through detailed CAD-based analysis and characterization. Transient simulations, based on a HSPICE circuit model and previous measurements of eye diagrams for a NRZ 2/sup 31/-1 pseudorandom binary sequence (PRBS), show that the OEIC photoreceiver is capable of operation up to 24 Gb/s.Keywords
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