Recent VLSI neural networks in Japan

This publication has 20 references indexed in Scilit:

• Neural network LSI chip with on-chip learning
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture
  IEEE Journal of Solid-State Circuits, 1991
• Pulse-stream VLSI neural networks mixing analog and digital techniques
  IEEE Transactions on Neural Networks, 1991
• A self-learning neural network composed of 1152 digital neurons in wafer-scale LSIs
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1991
• A parallel ASIC VLSI neurocomputer for a large number of neurons and billion connections per second speed
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1991
• Pulse-processing neural net hardware with selectable topology and adaptive weights and delays
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990
• A CCD based neural network integrated circuit with 64K analog programmable synapses
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990
• A BiCMOS analog neural network with dynamically updated weights
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990
• Asynchronous VLSI neural networks using pulse-stream arithmetic
  IEEE Journal of Solid-State Circuits, 1988
• A silicon model of early visual processing
  Neural Networks, 1988