A 14-b 2.5 MSPS pipelined ADC with on chip EPROM

This publication has 4 references indexed in Scilit:

• A 15-b 1-Msample/s digitally self-calibrated pipeline ADC
  IEEE Journal of Solid-State Circuits, 1993
• Two approaches to increasing spurious free dynamic range in high speed DACs
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1993
• A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3- mu m CMOS
  IEEE Journal of Solid-State Circuits, 1991
• A 14b Linear, 250ns Sample-and-hold Subsystem With Self-correction
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1991