Unifying synchronous/asynchronous state machine synthesis

This publication has 14 references indexed in Scilit:

• Translating concurrent programs into delay-insensitive circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Synthesis of timed asynchronous circuits
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Practical asynchronous controller design
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Synthesis of 3D asynchronous state machines
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Synthesis and optimization of asynchronous controllers based on extended lock graph theory
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Synthesis of asynchronous state machines using a local clock
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Automatic technology mapping for generalized fundamental-mode asynchronous designs
  Published by Association for Computing Machinery (ACM) ,1993
• Exact two-level minimization of hazard-free logic with multiple-input changes
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1992
• Internal State Assignments for Asynchronous Sequential Machines
  IEEE Transactions on Electronic Computers, 1966