Equivalent design representations and transformations for interactive scheduling
- 1 January 1992
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
It is pointed out that high-level synthesis (HLS) requires more designer interaction to better meet the needs of experienced designers. However, attempts to create a highly interactive synthesis process are hampered by incompatibility of various representations used during synthesis. To overcome this problem, equivalent representations are needed, as well as equivalence-preserving synthesis transformations. The structured finite state machine (SFSM) design model for scheduled behavior is presented, its equivalence to the control data flow graph (CDFG) model is shown, and primitive behavior-preserving transformations for scheduling are defined. This model and these transformations have been integrated into the BIF interactive environment to permit manual rescheduling of a design.Keywords
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