Systolic architectures for decoding Reed-Solomon codes
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
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- A Transformational Model of VLSI Systolic DesignComputer, 1985
- Error-Correction Coding for Digital CommunicationsPublished by Springer Nature ,1981