Impact of packaging technology on system partitioning: a case study
- 19 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 144-149
- https://doi.org/10.1109/mcmc.1995.512018
Abstract
This paper emphasizes concurrent consideration of the partitioning of a microelectronic circuit design into multiple dies and the selection of the appropriate packaging technology for implementation of the entire system. Partitioning a large design into a multichip package is a non-trivial task. Similarly, selection of the MCM packaging technology to accommodate a multichip solution can also be puzzling. The interdependencies of these two problems afford the opportunity to achieve a global optimum when considered concurrently. In this paper we address the partitioning/MCM technology tradeoff, their interdependency and previous work in this area. The SUN MicroSparc CPU is used as a demonstration vehicle and is partitioned for different MCM technologies. The preliminary results show that the optimum number of partitions and contents of each partition depend heavily on the choice of MCM technologies for a given application.Keywords
This publication has 3 references indexed in Scilit:
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- The tradeoff between peripheral and area array bonding of components in multichip modulesIEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A, 1994
- Design for packageability-early consideration of packaging from a VLSI designer's viewpointComputer, 1993