A novel clock recovery circuit for fully monolithic integration

This publication has 9 references indexed in Scilit:

• 40 Gb/s integrated clock and data recovery circuit in a silicon bipolar technology
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Limitations and challenges of single-carrier full 40-Gbit/s repeater system based on optical equalization and new circuit design
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Exclusive OR/NOR IC for > 40 Gbit/s optical transmissionsystems
  Electronics Letters, 1998
• A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1998
• Optical repeater circuit design based on InAlAs/InGaAs HEMT digital IC technology
  IEEE Transactions on Microwave Theory and Techniques, 1997
• 64 Gbit/s multiplexer IC using InAlAs/InGaAs/InPHEMTs
  Electronics Letters, 1997
• 40 and 20 Gbit/s monolithic integrated clock recoveryusing a fully-balanced narrowband regenerative frequency divider with 0.2 µmAlGaAs/GaAs HEMTs
  Electronics Letters, 1996
• A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-μm GaAs MESFET
  IEEE Journal of Solid-State Circuits, 1995
• Injection locking of microwave solid-state oscillators
  Proceedings of the IEEE, 1973