40 Gb/s integrated clock and data recovery circuit in a silicon bipolar technology

This publication has 7 references indexed in Scilit:

• Packaged clock recovery integrated circuits for 40 Gbit/s optical communication links
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A 50 GHz implanted base silicon bipolar technology with 35 GHz static frequency divider
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• 40 Gbit/s unrepeatered optical transmission over148 km by electrical time division multiplexing and demultiplexing
  Electronics Letters, 1997
• 20-40 Gb/s 0.2-/spl mu/m GaAs HEMT chip set for optical data receiver
  IEEE Journal of Solid-State Circuits, 1997
• 60 Gbit/s time-division multiplexer in SiGe-bipolartechnology with special regard to mounting and measuring technique
  Electronics Letters, 1997
• InP-HBT chip-set for 40-Gb/s fiber optical communication systems operational at 3 V
  IEEE Journal of Solid-State Circuits, 1997
• 46 Gb/s DEMUX, 50 Gb/s MUX, and 30 GHz static frequency divider in silicon bipolar technology
  IEEE Journal of Solid-State Circuits, 1996