Optimum tapered buffer
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 27 (1) , 118-119
- https://doi.org/10.1109/4.109565
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- CMOS tapered bufferIEEE Journal of Solid-State Circuits, 1990
- Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuitsIEEE Journal of Solid-State Circuits, 1984
- Driving large capacitance in MOS LIS systemsIEEE Journal of Solid-State Circuits, 1984