Establishment of a Radiation Hardened CMOS Manufacturing Process
- 1 January 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 24 (6) , 2056-2059
- https://doi.org/10.1109/TNS.1977.4329164
Abstract
A radiation hardened metal gate CMOS IC process, tolerant to doses in excess of 106 rads (Si), has been established by making necessary modifications to a standard process. These modifications are described, a definition of circuit radiation hardness is discussed, and typical electrical performance characteristics as a function of radiation dose are presented. Procedures are described for assuring the hardness of finished product. Operating life test data indicates that the process is inherently reliable.Keywords
This publication has 2 references indexed in Scilit:
- Process technology for radiation-hardened CMOS integrated circuitsIEEE Journal of Solid-State Circuits, 1976
- Effects of ionizing radiation on oxidized silicon surfaces and planar devicesProceedings of the IEEE, 1967