A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks

This publication has 16 references indexed in Scilit:

• ×pipesCompiler: a tool for instantiating application specific networks on chip
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2004
• Power-driven design of router microarchitectures in on-chip networks
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2004
• Energy-aware mapping for tile-based NoC architectures under performance constraints
  Published by Association for Computing Machinery (ACM) ,2003
• The impact of instruction-level parallelism on multiprocessor performance and simulation methodology
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Networks on chips: a new SoC paradigm
  Computer, 2002
• Analysis of power consumption on switch fabrics in network routers
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• The future of wires
  Proceedings of the IEEE, 2001
• Route packets, net wires
  Published by Association for Computing Machinery (ACM) ,2001
• SPLASH
  ACM SIGARCH Computer Architecture News, 1992
• Express cubes: improving the performance of k-ary n-cube interconnection networks
  IEEE Transactions on Computers, 1991