Compact DC model of GaAs FETs for large-signal computer calculation
- 1 April 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 18 (2) , 211-213
- https://doi.org/10.1109/jssc.1983.1051924
Abstract
A modified, simple and fairly accurate explicit expression of DC current-voltage characteristics of GaAs FETs is presented. A departure from the square-law behavior in saturation of the short channel transistor is included by introducing drain-source voltage bias dependent pinch-off potential. The model proposed here needs four parameters extracted by the global curve-fitting technique of a measured family of drain current-voltage characteristics. A comparison with other DC compact models of MESFETs valid over the entire range of drain-source voltages shows good compromise between simplicity and accuracy of the model proposed. The model can be easily implemented in programs of computer-aided analysis and design of circuits with GaAs FETs.Keywords
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