A subnanosecond 5-kbit bipolar ECL RAM
- 1 January 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 23 (5) , 1265-1267
- https://doi.org/10.1109/4.5954
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A 1.0-ns 5-kbit ECL RAMIEEE Journal of Solid-State Circuits, 1986
- 1.25 /spl mu/m Deep-Groove-Isolated Self-Aligned Bipolar CircuitsIEEE Journal of Solid-State Circuits, 1982
- A 3-ns 1-kbit RAM using super self-aligned process technologyIEEE Journal of Solid-State Circuits, 1981
- Self-aligned bipolar transistors for high-performance and low-power-delay VLSIIEEE Transactions on Electron Devices, 1981