Gate slow transients in GaAs MESFETs-causes, cures, and impact on circuits
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 842-845
- https://doi.org/10.1109/iedm.1988.32942
Abstract
Gate slow transient (or gate lag) in GaAs MESFETs were investigated and found to be responsible for pulse narrowing and loss of transmitted pulses in long inverter chains. Gate transients are caused by surface states near the edges of the gate. Gate transients can be drastically reduced in recessed gate MESFETs by controlling the gate trough geometry so that gates fit tightly in the bottom of the trough. Doping level and passivation also affect gate lag, although they are of less importance than trough geometry. Isolation technique and subchannel material structure do not strongly affect gate lag. Dispersion of FET output conductance is also found to be independent of gate lag.<>Keywords
This publication has 6 references indexed in Scilit:
- A manufacturable, 26 GHz GaAs MMIC technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Anomalous nanosecond transient component in a GaAs MODFET technologyIEEE Electron Device Letters, 1988
- Development of gate-lag effect on GaAs power MESFETs during agingElectronics Letters, 1987
- Surface influence on the conductance DLTS spectra of GaAs MESFET'sIEEE Transactions on Electron Devices, 1986
- Status of the surface and bulk parasitic effects limiting the performances of GaAs IC'sPhysica B+C, 1985
- GaAs MESFET logic with 4-GHz clock rateIEEE Journal of Solid-State Circuits, 1977