Fast execution for circuit consistency verification
- 30 September 1986
- journal article
- Published by Elsevier in Integration
- Vol. 4 (3) , 239-262
- https://doi.org/10.1016/0167-9260(86)90003-9
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- A Network Comparison Algorithm for Layout Verification of Integrated CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1984
- A New Automatic Logic Interconnection Verification System for VLSI DesignIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1983
- The graph isomorphism diseaseJournal of Graph Theory, 1977