Abstract
A PLA structure incorporating segmenting and folding features intended for use as a macro-cell for VLSI applications is described. A brief outline of a computer-aided-design system for the layout synthesis of such PLAs is given. The objectives are the attainment of compact area, low design time, and ease of design Symbolic layout generation for the PLA is treated in detail and practical design algorithms for partitioning and folding are discussed. An example is used to illustrate currently achievable results.

This publication has 5 references indexed in Scilit: