A 180 MHz 0.8 mu m BiCMOS modular memory family of DRAM and multiport SRAM

This publication has 12 references indexed in Scilit:

• A dual-port SRAM compiler for 0.8- mu m 100 K BiCMOS gate arrays
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A flexible multi-port RAM compiler for datapath
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A submicrometer CMOS embedded SRAM compiler
  IEEE Journal of Solid-State Circuits, 1992
• Using cache mechanisms to exploit nonrefreshing DRAMs for on-chip memories
  IEEE Journal of Solid-State Circuits, 1991
• A 6-ns 256-kb BiCMOS TTL SRAM
  IEEE Journal of Solid-State Circuits, 1991
• A 5-ns 1-Mb ECL BiCMOS SRAM
  IEEE Journal of Solid-State Circuits, 1990
• High speed multi-port static RAM silicon compiler
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1989
• Alpha-particle-induced charge collection measurements and the effectiveness of a novel p-well protection barrier on VLSI memories
  IEEE Transactions on Electron Devices, 1985
• A field-funneling effect on the collection of alpha-particle-generated carriers in silicon devices
  IEEE Electron Device Letters, 1981
• Modeling diffusion and collection of charge from ionizing radiation in silicon devices
  IEEE Transactions on Electron Devices, 1979