A variable long-precision arithmetic unit design for reconfigurable coprocessor architectures
- 27 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 2, 216-225
- https://doi.org/10.1109/fpga.1998.707899
Abstract
This paper presents the organization of an arithmetic unit for variable long-precision (VLP) operands suitable for reconfigurable computing. The reconfigurable arithmetic coprocessor (RAC) cooperates with the host computer in the VLP tasks. The main design issues addressed in the paper are: (a) mapping of the most frequent and time consuming operations of the VLP arithmetic algorithms to RAC, and (b) design of VLP algorithms that allow reduced reconfiguration time between arithmetic operations. The VLP arithmetic algorithms proposed cover multiplication, division and square root. In this paper we present the main building blocks used in the VLP arithmetic circuits, show the similarities of each arithmetic operator and present area/time estimates of these circuits in Xilinx FPGAs.KEYWORD_LIST: long-precision, computer arithmetic, reconfigurable architectureKeywords
This publication has 12 references indexed in Scilit:
- On digit-recurrence division implementations for field programmable gate arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A digit-recurrence square root implementation for field programmable gate arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Searching genetic databases on Splash 2Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Emulation of the Sparcle microprocessor with the MIT Virtual Wires emulation systemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A high-radix multiplier design for variable long-precision computationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Hardware design and arithmetic algorithms for a variable-precision, interval arithmetic coprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Implementing on line arithmetic on PAMPublished by Springer Nature ,1994
- VLSI design of on-line add/multiply algorithmsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1993
- On-Line Arithmetic: An OverviewPublished by SPIE-Intl Soc Optical Eng ,1984
- On-Line Algorithms for Division and MultiplicationIEEE Transactions on Computers, 1977