Design Rule Verification Based on One Dimensional Scans
- 1 January 1978
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Bell-Northern Research has developed a program for design rule checking of integrated circuit masks, based on a one-dimensional scanning technique using a novel data coding scheme for efficient processing of large volumes of geometric data. The rule checking concept is very simple and the program is small and easily implemented. The technique is also extremely economical, costing less than $100 to apply 25 design checks to a high density 5200 μm square silicon gate n-channel mask. CPU time varies approximately as the power 1.2 of the amount of data in the mask.Keywords
This publication has 3 references indexed in Scilit:
- A layout checking system for large scale integrated circuitsPublished by Association for Computing Machinery (ACM) ,1988
- Fast algorithm for LSI artwork analysisPublished by Association for Computing Machinery (ACM) ,1988
- XYTOLR-A Computer Program for Integrated Circuit Mask Design CheckoutBell System Technical Journal, 1972