An 8 ns 1 Mb ECL BiCMOS SRAM
- 13 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- A 25-ns 1-Mbit CMOS SRAM with loading-free bit linesIEEE Journal of Solid-State Circuits, 1987
- A low power 46 ns 256 kbit CMOS static RAM with dynamic double word lineIEEE Journal of Solid-State Circuits, 1984
- A high-speed 64K CMOS RAM with bipolar sense amplifiersIEEE Journal of Solid-State Circuits, 1984