Physical mechanisms for short channel effects in polysilicon thin films transistors
- 7 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 349-352
- https://doi.org/10.1109/iedm.1989.74295
Abstract
It is demonstrated that channel avalanched multiplication is the dominant mechanism giving rise to short-channel threshold shifts in n- and p-channel polysilicon thin-film transistors (TFTs) at moderate or high drain bias. The effects are greater in nMOS TFTs than pMOS due to the higher ionization rates for electrons in comparison to holes. At low drain bias, a charge sharing mechanism dominates and p-channel devices show greater threshold shifts. Device design parameters such as gate oxide or active island thickness have little influence, and the most effective method for reducing the threshold shifts is to reduce the supply voltage. When the supply voltage is scaled to maintain a fixed minimum threshold voltage, CMOS circuit speeds decrease at shorter gate lengths when a fixed capacitive load is driven, although in more complex circuits the speed improves.> Author(s) Lewis, A.G. Xerox Palo Alto Res. Center, CA, USA Huang, T.Y. ; Wu, I.-W. ; Bruce, R.H. ; Chiang, A.Keywords
This publication has 2 references indexed in Scilit:
- Improved subthreshold characteristics of n-channel SOI transistorsIEEE Electron Device Letters, 1986
- Reduction of floating substrate effect in thin-film SOI MOSFETsElectronics Letters, 1986