Improving Radiation Tolerance in Space-Borne Electronics
- 1 January 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 24 (6) , 2259-2265
- https://doi.org/10.1109/TNS.1977.4329203
Abstract
The Complementary Metal-Oxide-Semiconductor (CMOS) device is a very desirable form of technology for space use despite the low tolerance to radiation exhibited by current commercial samples. It is thus important to establish "hardness engineering" methods for systems employing these devices. It is necessary to deploy a wide variety of design methods to prolong the life of many present-day CMOS circuits. An original ranking scheme for various forms of CMOS technology is proposed, as are design rules for the layout of the spacecraft equipment platforms and of circuit elements within equipment boxes. Limitation of the electrical stress cycles applied to devices is shown to prolong life greatly. The addition of deadweight shielding is treated as a last resort. Design rules and formulae are emerging which enable the spacecraft designer to minimise added weight and maximise the life of the space vehicle.Keywords
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