A bipolar 4:1 time division multiplexer IC operating up to 5.5Gb/s

Publisher Website

1 January 1986

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 186-187
https://doi.org/10.1109/isscc.1986.1156886

Abstract

No abstract available

Keywords

This publication has 7 references indexed in Scilit:

Monolithic integrated 4:1 multiplexer and demultiplexer operating up to 4.8 Gbit/s
Electronics Letters, 1985
Integrated bipolar master/slave D-flip-flop with multiplexing capability for Gbit/s operation
Electronics Letters, 1984
Integrated bipolar 4:1 time-division multiplexer for bit rates up to 3 Gbit/s
Electronics Letters, 1984
A time division multiplexer IC for bit rates up to about 2 Gbits/s
IEEE Journal of Solid-State Circuits, 1984
A simple optimisation procedure for bipolar subnanosecond ICs with low power dissipation
Microelectronics Journal, 1982
A GaAs MSI word generator operating at 5 Gbits/s data rate
IEEE Transactions on Electron Devices, 1982
A versatile ECL multiplexer IC for the Gbit/s range
IEEE Journal of Solid-State Circuits, 1979