A 50-ps 7 K-gate masterslice using mixed cells consisting of an NTL gate and an LCML macrocell

This publication has 5 references indexed in Scilit:

• A 30-ps Si bipolar IC using super self-aligned process technology
  IEEE Transactions on Electron Devices, 1986
• Design and application of a 2500-gate bipolar macrocell array
  IEEE Journal of Solid-State Circuits, 1985
• An 80ps 2500-gate bipolar macrocell array
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1985
• A 333 ps/800 MHz 7 K-gate bipolar macrocell array employing 4 level metallization
  IEEE Journal of Solid-State Circuits, 1984
• A 5K-gate bipolar masterslice LSI with a 500 ps loaded gate delay
  IEEE Journal of Solid-State Circuits, 1983