Transmission line simulator as a basic component of CAD system for VLSI interconnects

1 January 1990

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 840-846
https://doi.org/10.1109/pccc.1990.101707

Abstract

A transmission line simulator, UANTL (University of Arizona Simulator for Nonlinear Terminated Transmission Line Network), its algorithm, and its application are presented. The role of UANTL as a basic element of a CAD system for VLSI interconnects is described. UANTL is simpler to use than SPICE because its input data file is not so complex. In the case of simple interconnections composed of two to three conductors, the CPU time required for the simulation with UANTL is, in general, an order less than that required for SPICE simulation. This CPU time savings will increase substantially for interconnections with four or more conductors.

Keywords

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