Formal verification of digital circuits using symbolic ternary system models

This publication has 4 references indexed in Scilit:

• Formal verification of memory circuits by switch-level simulation
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
• Boolean Analysis of MOS Circuits
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• COSMOS: a compiled simulator for MOS circuits
  Published by Association for Computing Machinery (ACM) ,1987
• On a Ternary Model of Gate Networks
  IEEE Transactions on Computers, 1979