Technology mapping via transformations of function graphs
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors address the problem of how to realize a given combinational circuit described by means of Boolean equations using the minimum number of blocks of the target TLU table lookup architecture. Their Boolean decomposition scheme works directly on a reduced ordered binary decision diagram (ROBDD) of a subject function, using two techniques. The first, referred to as cutting, is an efficient implementation of Roth-Karp decomposition. The second technique is referred to as a substitution. The idea is to replace subgraphs of ROBDD by new variables. The substitution process is accompanied by certain reductions of the resulting ROBDD graph, which further decreases its size.Keywords
This publication has 11 references indexed in Scilit:
- Improved logic synthesis algorithms for table look up architecturesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Multi-level logic minimization based on minimal support and its application to the minimization of look-up table type FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Logic synthesis for programmable gate arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Chortle: a technology mapping program for lookup table-based field programmable gate arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A heuristic method for FPGA technology mapping based on the edge visibilityPublished by Association for Computing Machinery (ACM) ,1991
- Chortle-crf: Fast technology mapping for lookup table-based FPGAsPublished by Association for Computing Machinery (ACM) ,1991
- XmapPublished by Association for Computing Machinery (ACM) ,1991
- MIS: A Multiple-Level Logic Optimization SystemIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Graph-Based Algorithms for Boolean Function ManipulationIEEE Transactions on Computers, 1986
- Minimization Over Boolean GraphsIBM Journal of Research and Development, 1962