Interface optimization for concurrent systems under timing constraints
- 1 September 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 1 (3) , 268-281
- https://doi.org/10.1109/92.238441
Abstract
The scope of most high-level synthesis efforts to date has been at the level of a single behavioral model represented as a control/data-flow graph. The communication between concurrently executing processes and its requirements in terms of timing and resources have largely been neglected. This restriction limits the applicability of most existing approaches for complex system designs. This paper describes a methodology for the synthesis of interfaces in concurrent systems under detailed timing constraints. The authors model interprocess communication using blocking and nonblocking messages. They show how the relationship between messages over time can be abstracted as a constraint graph that can be extracted and used during synthesis. They describe a novel technique called interface matching that minimizes the interface cost by scheduling each process with respect to timing information of other processes communicating with it. By scheduling the completion of operations, some blocking communication can be converted to nonblocking while ensuring the communication remains valid. To further reduce hardware costs, the authors describe the synthesis of interfaces on shared physical media. They show how this sharing can be increased through rescheduling and serialization of the communication. In addition to systematically reducing the interface synchronization cost, this approach permits analysis on the timing consistency of interprocess communication.Keywords
This publication has 18 references indexed in Scilit:
- Pre-scheduling for synchronization in hard real-time systemsPublished by Springer Nature ,2005
- Relative scheduling under timing constraints: algorithms for high-level synthesis of digital circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992
- Static scheduling for barrier MIMD architecturesThe Journal of Supercomputing, 1992
- High Level Synthesis of ASICs under Timing and Synchronization ConstraintsPublished by Springer Nature ,1992
- Architectural partitioning for system level synthesis of integrated circuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991
- Sizing synchronization queuesPublished by Association for Computing Machinery (ACM) ,1991
- Transformations for optimizing interprocess communication and synchronization mechanismsInternational Journal of Parallel Programming, 1990
- Static analysis of real-time distributed systemsIEEE Transactions on Software Engineering, 1990
- Static synchronization beyond VLIWPublished by Association for Computing Machinery (ACM) ,1989
- The drinking philosophers problemACM Transactions on Programming Languages and Systems, 1984