Space-charge layer width in diffused junctions
- 1 October 1959
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IRE Transactions on Electron Devices
- Vol. 6 (4) , 405-408
- https://doi.org/10.1109/t-ed.1959.14571
Abstract
This paper outlines a calculation of space-charge layer width in a planar junction made by diffusing an n or p impurity (assumed to follow a Gaussian or a complementary error function distribution) into a uniformly doped crystal of opposite conductivity type. The collector junction of most drift transistors conforms closely to this model. An exponential approximation to the impurity distribution permits curves to be drawn of the space-charge layer penetration in each direction from the junction as a function of applied reverse voltage, and of the electric field distribution. The quantities involved are normalized in terms of the initial doping level N1, the impurity diffusion lengthL = 2 \sqrt{Dt}, and the junction depth xj. The curves should be useful in calculating depletion-layer capacitance, transistor punch-through voltage and junction breakdown voltage.Keywords
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