30 Gbit/s 1:4 demultiplexer IC using AlGaAs/GaAsHBTs
- 24 April 1997
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 33 (9) , 765-766
- https://doi.org/10.1049/el:19970496
Abstract
An experimental high speed 1:4 demultiplexer integrated circuit featuring output bit alignment, reduced gate count, and a novel circuit architecture is presented. The experimental circuit features an inherently fast two-stage configuration, with operation at up to 30 Gbit/s demonstrated in an advanced AlGaAs/GaAs heterojunction bipolar technology. The system clock frequency is half the bit rate with only one additional self-generated internal clock necessary.Keywords
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