Optimisation of a thin epitaxial Si layer as Ge passivation layer to demonstrate deep sub-micron n- and p-FETs on Ge-On-Insulator substrates

This publication has 4 references indexed in Scilit:

• Germanium p- and n-MOSFETs fabricated with novel surface passivation (plasma-PH/sub 3/ and thin AlN) and TaN/HfO/sub 2/ gate stack
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005
• Ge deep sub-micron pFETs with etched TaN metal gate on a high-k dielectric, fabricated in a 200mm silicon prototyping line
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2004
• Alternative surface passivation on germanium for metal-oxide-semiconductor applications with high-k gate dielectric
  Applied Physics Letters, 2004
• Ge MOS characteristics with CVD HfO/sub 2/ gate dielectrics and TaN gate electrode
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2004