Future general purpose supercomputer architectures
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors discuss the challenges facing designers of future general-purpose supercomputers, and describe architectural features and characteristics that may be used to meet these challenges. Balancing vector/scalar performance, vector performance, scalar processing, supporting scalability, large-scale memory systems, and high-performance I/O and networking are discussed. Performance trends and projections for general-purpose supercomputer systems are given.Keywords
This publication has 10 references indexed in Scilit:
- The Convex C240 architecturePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- The birth of the second generation: the Hitachi S-820/80Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Fast barrier synchronization hardwarePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Machine organization of the IBM RISC System/6000 processorIBM Journal of Research and Development, 1990
- Supercomputer hardware: an update of the 1983 report's summary and tablesComputer, 1989
- Dynamic instruction scheduling and the Astronautics ZS-1Computer, 1989
- Synchronization, coherence, and event ordering in multiprocessorsComputer, 1988
- Architecture and performance of NEC supercomputer SX systemParallel Computing, 1987
- Parallel Supercomputing Today and the Cedar ApproachScience, 1986
- Banyan networks for partitioning multiprocessor systemsPublished by Association for Computing Machinery (ACM) ,1973